#--  Synopsys, Inc.
#--  Version H-2013.03
#--  Project file F:\PSTR17R5B\scratchproject.prs

#project files
add_file -verilog "D:/Synopsys/fpga_H201303/bin/../lib/xilinx/unisim.v"
add_file -xilinx "F:/PSTR17R5B/ipcore_dir/myfifo.ngc"
add_file -xilinx "F:/PSTR17R5B/ipcore_dir/myila.ngc"
add_file -xilinx "F:/PSTR17R5B/ipcore_dir/myicon.ngc"
add_file -verilog "F:/PSTR17R5B/parallel_wr.v"
add_file -verilog "F:/PSTR17R5B/spi_slave_r.v"
add_file -verilog "F:/PSTR17R5B/ipcore_dir/myila.v"
add_file -verilog "F:/PSTR17R5B/ipcore_dir/myicon.v"
add_file -verilog "F:/PSTR17R5B/ipcore_dir/myfifo.v"
add_file -verilog "F:/PSTR17R5B/ad9914_reg_wr.v"
add_file -verilog "F:/PSTR17R5B/work_flow.v"
add_file -verilog "F:/PSTR17R5B/pwr_rst.v"
add_file -verilog "F:/PSTR17R5B/ds3502.v"
add_file -verilog "F:/PSTR17R5B/depack.v"
add_file -verilog "F:/PSTR17R5B/ad9914_ctrl.v"
add_file -verilog "F:/PSTR17R5B/top.v"
add_file -constraint "F:/PSTR17R5B/top.sdc"


#implementation: "PSTR17R5B"
impl -add F:\PSTR17R5B -type fpga

#
#implementation attributes

set_option -vlog_std v2001
set_option -num_critical_paths 0
set_option -num_startend_points 0

#device options
set_option -technology SPARTAN6
set_option -part XC6SLX25
set_option -package csg324
set_option -speed_grade -2
set_option -part_companion ""

#compilation/mapping options
set_option -use_fsm_explorer 0
set_option -top_module "top"

# mapper_options
set_option -frequency 1
set_option -write_verilog 0
set_option -write_vhdl 0
set_option -srs_instrumentation 1

# xilinx_options
set_option -RWCheckOnRam 1

# Xilinx Spartan3
set_option -run_prop_extract 1
set_option -maxfan 100
set_option -disable_io_insertion 0
set_option -pipe 1
set_option -retiming 0
set_option -update_models_cp 0
set_option -fix_gated_and_generated_clocks 1
set_option -no_sequential_opt 0

# Xilinx Spartan6
set_option -enable_prepacking 1

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 1
set_option -resource_sharing 1

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "F:/PSTR17R5B/top.edn"
impl -active "PSTR17R5B"