# See LICENSE.Cambridge for license details.

#--------------------------------------------------------------------
# Build Verilog
#--------------------------------------------------------------------

.SECONDARY: $(firrtl) $(verilog)

$(generated_dir)/%.fir $(generated_dir)/%.d: $(FIRRTL_JAR) $(chisel_srcs) $(bootrom_image)
	mkdir -p $(dir $@)
	cd $(base_dir) && $(SBT) "runMain $(PROJECT).Generator $(generated_dir) $(PROJECT) $(MODEL) $(PROJECT) $(CONFIG)"

$(generated_dir)/%.sv $(generated_dir)/%.conf: $(generated_dir)/%.fir $(FIRRTL_JAR)
	mkdir -p $(dir $@)
	$(FIRRTL) -i $< -o $(generated_dir)/$*.sv -X sverilog --infer-rw $(MODEL) --repl-seq-mem -c:$(MODEL):-o:$(generated_dir)/$*.conf

$(generated_dir)/consts.vh: $(generated_dir)/$(PROJECT).$(CONFIG).fir
	cp $(generated_dir)/$(CONFIG).vh $(generated_dir)/consts.vh

$(generated_dir)/%.behav_srams.sv: $(generated_dir)/%.conf
	$(mem_gen) $< > $@.tmp && mv -f $@.tmp $@


# emacs local variable

# Local Variables:
# mode: makefile
# End: